Commit ec427498 authored by Stefan Berger's avatar Stefan Berger

tpm: convert tpm_crb.c to use trace-events

Signed-off-by: 's avatarStefan Berger <stefanb@linux.vnet.ibm.com>
Reviewed-by: 's avatarPhilippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: 's avatarMarc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: 's avatarStefan Hajnoczi <stefanha@redhat.com>
parent 8cb340c6
......@@ -162,6 +162,7 @@ trace-events-subdirs += hw/alpha
trace-events-subdirs += hw/hppa
trace-events-subdirs += hw/xen
trace-events-subdirs += hw/ide
trace-events-subdirs += hw/tpm
trace-events-subdirs += ui
trace-events-subdirs += audio
trace-events-subdirs += net
......
......@@ -29,6 +29,7 @@
#include "sysemu/reset.h"
#include "tpm_int.h"
#include "tpm_util.h"
#include "trace.h"
typedef struct CRBState {
DeviceState parent_obj;
......@@ -44,14 +45,6 @@ typedef struct CRBState {
#define CRB(obj) OBJECT_CHECK(CRBState, (obj), TYPE_TPM_CRB)
#define DEBUG_CRB 0
#define DPRINTF(fmt, ...) do { \
if (DEBUG_CRB) { \
printf(fmt, ## __VA_ARGS__); \
} \
} while (0)
#define CRB_INTF_TYPE_CRB_ACTIVE 0b1
#define CRB_INTF_VERSION_CRB 0b1
#define CRB_INTF_CAP_LOCALITY_0_ONLY 0b0
......@@ -91,8 +84,8 @@ static uint64_t tpm_crb_mmio_read(void *opaque, hwaddr addr,
unsigned offset = addr & 3;
uint32_t val = *(uint32_t *)regs >> (8 * offset);
DPRINTF("CRB read 0x" TARGET_FMT_plx " len:%u val: 0x%" PRIx32 "\n",
addr, size, val);
trace_tpm_crb_mmio_read(addr, size, val);
return val;
}
......@@ -100,8 +93,8 @@ static void tpm_crb_mmio_write(void *opaque, hwaddr addr,
uint64_t val, unsigned size)
{
CRBState *s = CRB(opaque);
DPRINTF("CRB write 0x" TARGET_FMT_plx " len:%u val: 0x%" PRIx64 "\n",
addr, size, val);
trace_tpm_crb_mmio_write(addr, size, val);
switch (addr) {
case A_CRB_CTRL_REQ:
......
# See docs/devel/tracing.txt for syntax documentation.
# hw/tpm/tpm_crb.c
tpm_crb_mmio_read(uint64_t addr, unsigned size, uint32_t val) "CRB read 0x" TARGET_FMT_plx " len:%u val: 0x%" PRIx32
tpm_crb_mmio_write(uint64_t addr, unsigned size, uint32_t val) "CRB write 0x" TARGET_FMT_plx " len:%u val: 0x%" PRIx32
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