Commit cf83f140 authored by Eric Blake's avatar Eric Blake Committed by Markus Armbruster

shutdown: Add source information to SHUTDOWN and RESET

Time to wire up all the call sites that request a shutdown or
reset to use the enum added in the previous patch.

It would have been less churn to keep the common case with no
arguments as meaning guest-triggered, and only modified the
host-triggered code paths, via a wrapper function, but then we'd
still have to audit that I didn't miss any host-triggered spots;
changing the signature forces us to double-check that I correctly
categorized all callers.

Since command line options can change whether a guest reset request
causes an actual reset vs. a shutdown, it's easy to also add the
information to reset requests.
Signed-off-by: 's avatarEric Blake <eblake@redhat.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au> [ppc parts]
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> [SPARC part]
Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com> [s390x parts]
Message-Id: <20170515214114.15442-5-eblake@redhat.com>
Reviewed-by: 's avatarMarkus Armbruster <armbru@redhat.com>
Signed-off-by: 's avatarMarkus Armbruster <armbru@redhat.com>
parent 802f045a
......@@ -561,7 +561,7 @@ static void acpi_pm1_cnt_write(ACPIREGS *ar, uint16_t val)
uint16_t sus_typ = (val >> 10) & 7;
switch(sus_typ) {
case 0: /* soft power off */
qemu_system_shutdown_request();
qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
break;
case 1:
qemu_system_suspend_request();
......@@ -569,7 +569,7 @@ static void acpi_pm1_cnt_write(ACPIREGS *ar, uint16_t val)
default:
if (sus_typ == ar->pm1.cnt.s4_val) { /* S4 request */
qapi_event_send_suspend_disk(&error_abort);
qemu_system_shutdown_request();
qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
}
break;
}
......
......@@ -108,9 +108,9 @@ static void hb_regs_write(void *opaque, hwaddr offset,
if (offset == 0xf00) {
if (value == 1 || value == 2) {
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
} else if (value == 3) {
qemu_system_shutdown_request();
qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
}
}
......
......@@ -158,7 +158,7 @@ static void integratorcm_do_remap(IntegratorCMState *s)
static void integratorcm_set_ctrl(IntegratorCMState *s, uint32_t value)
{
if (value & 8) {
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
}
if ((s->cm_ctrl ^ value) & 1) {
/* (value & 1) != 0 means the green "MISC LED" is lit.
......
......@@ -898,7 +898,7 @@ static void mv88w8618_pit_write(void *opaque, hwaddr offset,
case MP_BOARD_RESET:
if (value == MP_BOARD_RESET_MAGIC) {
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
}
break;
}
......
......@@ -355,7 +355,7 @@ static void omap_wd_timer_write(void *opaque, hwaddr addr,
/* XXX: on T|E hardware somehow this has no effect,
* on Zire 71 it works as specified. */
s->reset = 1;
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
}
}
s->last_wr = value & 0xff;
......@@ -1545,8 +1545,10 @@ static inline void omap_clkm_idlect1_update(struct omap_mpu_state_s *s,
if (value & (1 << 11)) { /* SETARM_IDLE */
cpu_interrupt(CPU(s->cpu), CPU_INTERRUPT_HALT);
}
if (!(value & (1 << 10))) /* WKUP_MODE */
qemu_system_shutdown_request(); /* XXX: disable wakeup from IRQ */
if (!(value & (1 << 10))) { /* WKUP_MODE */
/* XXX: disable wakeup from IRQ */
qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
}
#define SET_CANIDLE(clock, bit) \
if (diff & (1 << bit)) { \
......@@ -1693,7 +1695,7 @@ static void omap_clkm_write(void *opaque, hwaddr addr,
diff = s->clkm.arm_rstct1 ^ value;
s->clkm.arm_rstct1 = value & 0x0007;
if (value & 9) {
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
s->clkm.cold_start = 0xa;
}
if (diff & ~value & 4) { /* DSP_RST */
......
......@@ -1610,7 +1610,7 @@ static void omap_prcm_write(void *opaque, hwaddr addr,
case 0x450: /* RM_RSTCTRL_WKUP */
/* TODO: reset */
if (value & 2)
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
break;
case 0x454: /* RM_RSTTIME_WKUP */
s->rsttime_wkup = value & 0x1fff;
......
......@@ -848,7 +848,7 @@ static void spitz_lcd_hsync_handler(void *opaque, int line, int level)
static void spitz_reset(void *opaque, int line, int level)
{
if (level) {
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
}
}
......
......@@ -1197,7 +1197,7 @@ static
void do_sys_reset(void *opaque, int n, int level)
{
if (level) {
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
}
}
......
......@@ -90,7 +90,7 @@ static void tosa_out_switch(void *opaque, int line, int level)
static void tosa_reset(void *opaque, int line, int level)
{
if (level) {
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
}
}
......
......@@ -519,7 +519,7 @@ static void port92_write(void *opaque, hwaddr addr, uint64_t val,
s->outport = val;
qemu_set_irq(s->a20_out, (val >> 1) & 1);
if ((val & 1) && !(oldval & 1)) {
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
}
}
......
......@@ -1398,7 +1398,7 @@ void xen_shutdown_fatal_error(const char *fmt, ...)
va_end(ap);
fprintf(stderr, "Will destroy the domain.\n");
/* destroy the domain */
qemu_system_shutdown_request();
qemu_system_shutdown_request(SHUTDOWN_CAUSE_HOST_ERROR);
}
void xen_hvm_modified_memory(ram_addr_t start, ram_addr_t length)
......
......@@ -226,7 +226,7 @@ static void outport_write(KBDState *s, uint32_t val)
s->outport = val;
qemu_set_irq(s->a20_out, (val >> 1) & 1);
if (!(val & 1)) {
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
}
}
......@@ -301,7 +301,7 @@ static void kbd_write_command(void *opaque, hwaddr addr,
s->outport &= ~KBD_OUT_A20;
break;
case KBD_CCMD_RESET:
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
break;
case KBD_CCMD_NO_OP:
/* ignore that */
......
......@@ -44,14 +44,14 @@ static int ipmi_do_hw_op(IPMIInterface *s, enum ipmi_op op, int checkonly)
if (checkonly) {
return 0;
}
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
return 0;
case IPMI_POWEROFF_CHASSIS:
if (checkonly) {
return 0;
}
qemu_system_shutdown_request();
qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
return 0;
case IPMI_SEND_NMI:
......
......@@ -606,7 +606,7 @@ static void ich9_rst_cnt_write(void *opaque, hwaddr addr, uint64_t val,
ICH9LPCState *lpc = opaque;
if (val & 4) {
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
return;
}
lpc->rst_cnt = val & 0xA; /* keep FULL_RST (bit 3) and SYS_RST (bit 1) */
......
......@@ -232,7 +232,7 @@ static void boston_platreg_write(void *opaque, hwaddr addr,
break;
case PLAT_SOFTRST_CTL:
if (val & PLAT_SOFTRST_CTL_SYSRESET) {
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
}
break;
default:
......
......@@ -470,7 +470,7 @@ static void malta_fpga_write(void *opaque, hwaddr addr,
/* SOFTRES Register */
case 0x00500:
if (val == 0x42)
qemu_system_reset_request ();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
break;
/* BRKRES Register */
......
......@@ -53,9 +53,9 @@ static void mips_qemu_write (void *opaque, hwaddr addr,
uint64_t val, unsigned size)
{
if ((addr & 0xffff) == 0 && val == 42)
qemu_system_reset_request ();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
else if ((addr & 0xffff) == 4 && val == 42)
qemu_system_shutdown_request ();
qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
}
static uint64_t mips_qemu_read (void *opaque, hwaddr addr,
......
......@@ -351,13 +351,13 @@ static bool vexpress_cfgctrl_write(arm_sysctl_state *s, unsigned int dcc,
break;
case SYS_CFG_SHUTDOWN:
if (site == SYS_CFG_SITE_MB && device == 0) {
qemu_system_shutdown_request();
qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
return true;
}
break;
case SYS_CFG_REBOOT:
if (site == SYS_CFG_SITE_MB && device == 0) {
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
return true;
}
break;
......@@ -429,7 +429,7 @@ static void arm_sysctl_write(void *opaque, hwaddr offset,
if (s->lockval == LOCK_VALUE) {
s->resetlevel = val;
if (val & 0x100) {
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
}
}
break;
......@@ -438,7 +438,7 @@ static void arm_sysctl_write(void *opaque, hwaddr offset,
if (s->lockval == LOCK_VALUE) {
s->resetlevel = val;
if (val & 0x04) {
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
}
}
break;
......
......@@ -356,7 +356,7 @@ static inline void retu_write(CBusRetu *s, int reg, uint16_t val)
case RETU_REG_WATCHDOG:
if (val == 0 && (s->cc[0] & 2))
qemu_system_shutdown_request();
qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
break;
case RETU_REG_TXCR:
......
......@@ -612,7 +612,7 @@ static bool cuda_cmd_powerdown(CUDAState *s,
return false;
}
qemu_system_shutdown_request();
qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
return true;
}
......@@ -624,7 +624,7 @@ static bool cuda_cmd_reset_system(CUDAState *s,
return false;
}
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
return true;
}
......
......@@ -258,7 +258,7 @@ static void slavio_aux2_mem_writeb(void *opaque, hwaddr addr,
val &= AUX2_PWROFF;
s->aux2 = val;
if (val & AUX2_PWROFF)
qemu_system_shutdown_request();
qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
slavio_misc_update_irq(s);
}
......@@ -338,7 +338,7 @@ static void slavio_sysctrl_mem_writel(void *opaque, hwaddr addr,
case 0:
if (val & SYS_RESET) {
s->sysctrl = SYS_RESETSTAT;
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
}
break;
default:
......
......@@ -405,7 +405,7 @@ static void zynq_slcr_write(void *opaque, hwaddr offset,
switch (offset) {
case PSS_RST_CTRL:
if (val & R_PSS_RST_CTRL_SOFT_RST) {
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
}
break;
}
......
......@@ -482,9 +482,9 @@ static void apb_config_writel (void *opaque, hwaddr addr,
s->reset_control |= val & RESET_WMASK;
if (val & SOFT_POR) {
s->nr_resets = 0;
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
} else if (val & SOFT_XIR) {
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
}
}
break;
......
......@@ -269,7 +269,7 @@ static void bonito_writel(void *opaque, hwaddr addr,
}
s->regs[saddr] = val;
if (reset) {
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
}
break;
case BONITO_INTENSET:
......
......@@ -632,7 +632,7 @@ static void rcr_write(void *opaque, hwaddr addr, uint64_t val, unsigned len)
PIIX3State *d = opaque;
if (val & 4) {
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
return;
}
d->rcr = val & 2; /* keep System Reset type only */
......
......@@ -774,7 +774,7 @@ static qemu_irq *ppce500_init_mpic(MachineState *machine, PPCE500Params *params,
static void ppce500_power_off(void *opaque, int line, int on)
{
if (on) {
qemu_system_shutdown_request();
qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
}
}
......
......@@ -98,7 +98,7 @@ static void mpc8544_guts_write(void *opaque, hwaddr addr,
switch (addr) {
case MPC8544_GUTS_ADDR_RSTCR:
if (value & MPC8544_GUTS_RSTCR_RESET) {
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
}
break;
default:
......
......@@ -412,7 +412,7 @@ static void ppce500_set_irq(void *opaque, int pin, int level)
if (level) {
LOG_IRQ("%s: reset the PowerPC system\n",
__func__);
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
}
break;
case PPCE500_INPUT_RESET_CORE:
......
......@@ -1807,7 +1807,7 @@ void ppc40x_chip_reset(PowerPCCPU *cpu)
void ppc40x_system_reset(PowerPCCPU *cpu)
{
printf("Reset PowerPC system\n");
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
}
void store_40x_dbcr0 (CPUPPCState *env, uint32_t val)
......
......@@ -1162,7 +1162,7 @@ static target_ulong h_client_architecture_support(PowerPCCPU *cpu,
spapr_ovec_cleanup(ov5_updates);
if (spapr->cas_reboot) {
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
} else {
/* If ppc_spapr_reset() did not set up a HPT but one is necessary
* (because the guest isn't going to use radix) then set it up here. */
......
......@@ -110,7 +110,7 @@ static void rtas_power_off(PowerPCCPU *cpu, sPAPRMachineState *spapr,
rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
return;
}
qemu_system_shutdown_request();
qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
cpu_stop_current();
rtas_st(rets, 0, RTAS_OUT_SUCCESS);
}
......@@ -124,7 +124,7 @@ static void rtas_system_reboot(PowerPCCPU *cpu, sPAPRMachineState *spapr,
rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
return;
}
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
rtas_st(rets, 0, RTAS_OUT_SUCCESS);
}
......
......@@ -396,7 +396,7 @@ void s390_reipl_request(void)
S390IPLState *ipl = get_ipl_device();
ipl->reipl_requested = true;
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
}
void s390_ipl_prepare_cpu(S390CPU *cpu)
......
......@@ -164,7 +164,7 @@ r2d_fpga_write(void *opaque, hwaddr addr, uint64_t value, unsigned int size)
break;
case PA_POWOFF:
if (value & 1) {
qemu_system_shutdown_request();
qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
}
break;
case PA_VERREG:
......
......@@ -207,7 +207,7 @@ static void watchdog_hit(void *opaque)
qemu_irq_raise(t->nmi);
}
else
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
t->wd_hits++;
}
......
/*
* QEMU M48T59 and M48T08 NVRAM emulation for PPC PREP and Sparc platforms
*
* Copyright (c) 2003-2005, 2007 Jocelyn Mayer
* Copyright (c) 2003-2005, 2007, 2017 Jocelyn Mayer
* Copyright (c) 2013 Hervé Poussineau
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
......@@ -159,7 +159,7 @@ static void watchdog_cb (void *opaque)
NVRAM->buffer[0x1FF7] = 0x00;
NVRAM->buffer[0x1FFC] &= ~0x40;
/* May it be a hw CPU Reset instead ? */
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
} else {
qemu_set_irq(NVRAM->IRQ, 1);
qemu_set_irq(NVRAM->IRQ, 0);
......
......@@ -90,7 +90,7 @@ static void sysctl_icap_write(MilkymistSysctlState *s, uint32_t value)
trace_milkymist_sysctl_icap_write(value);
switch (value & 0xffff) {
case 0x000e:
qemu_system_shutdown_request();
qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
break;
}
}
......@@ -195,7 +195,7 @@ static void sysctl_write(void *opaque, hwaddr addr, uint64_t value,
s->regs[addr] = 1;
break;
case R_SYSTEM_ID:
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
break;
case R_GPIO_IN:
......
......@@ -401,7 +401,7 @@ static void pxa2xx_timer_tick(void *opaque)
if (t->num == 3)
if (i->reset3 & 1) {
i->reset3 = 0;
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
}
}
......
......@@ -110,7 +110,7 @@ void watchdog_perform_action(void)
switch (watchdog_action) {
case WDT_RESET: /* same as 'system_reset' in monitor */
qapi_event_send_watchdog(WATCHDOG_EXPIRATION_ACTION_RESET, &error_abort);
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
break;
case WDT_SHUTDOWN: /* same as 'system_powerdown' in monitor */
......
......@@ -148,7 +148,7 @@ static void xen_domain_poll(void *opaque)
return;
quit:
qemu_system_shutdown_request();
qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
}
static int xen_domain_watcher(void)
......
......@@ -100,7 +100,7 @@ static void lx60_fpga_write(void *opaque, hwaddr addr,
case 0x10: /*board reset*/
if (val == 0xdead) {
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
}
break;
}
......
......@@ -62,13 +62,13 @@ typedef enum WakeupReason {
QEMU_WAKEUP_REASON_OTHER,
} WakeupReason;
void qemu_system_reset_request(void);
void qemu_system_reset_request(ShutdownCause reason);
void qemu_system_suspend_request(void);
void qemu_register_suspend_notifier(Notifier *notifier);
void qemu_system_wakeup_request(WakeupReason reason);
void qemu_system_wakeup_enable(WakeupReason reason, bool enabled);
void qemu_register_wakeup_notifier(Notifier *notifier);
void qemu_system_shutdown_request(void);
void qemu_system_shutdown_request(ShutdownCause reason);
void qemu_system_powerdown_request(void);
void qemu_register_powerdown_notifier(Notifier *notifier);
void qemu_system_debug_request(void);
......
......@@ -2052,7 +2052,7 @@ int kvm_cpu_exec(CPUState *cpu)
break;
case KVM_EXIT_SHUTDOWN:
DPRINTF("shutdown\n");
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
ret = EXCP_INTERRUPT;
break;
case KVM_EXIT_UNKNOWN:
......@@ -2066,11 +2066,11 @@ int kvm_cpu_exec(CPUState *cpu)
case KVM_EXIT_SYSTEM_EVENT:
switch (run->system_event.type) {
case KVM_SYSTEM_EVENT_SHUTDOWN:
qemu_system_shutdown_request();
qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
ret = EXCP_INTERRUPT;
break;
case KVM_SYSTEM_EVENT_RESET:
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
ret = EXCP_INTERRUPT;
break;
case KVM_SYSTEM_EVENT_CRASH:
......
......@@ -52,7 +52,7 @@ int setenv(const char *name, const char *value, int overwrite)
static BOOL WINAPI qemu_ctrl_handler(DWORD type)
{
qemu_system_shutdown_request();
qemu_system_shutdown_request(SHUTDOWN_CAUSE_HOST_SIGNAL);
/* Windows 7 kills application when the function returns.
Sleep here to give QEMU a try for closing.
Sleep period is 10000ms because Windows kills the program
......
......@@ -84,7 +84,7 @@ UuidInfo *qmp_query_uuid(Error **errp)
void qmp_quit(Error **errp)
{
no_shutdown = 0;
qemu_system_shutdown_request();
qemu_system_shutdown_request(SHUTDOWN_CAUSE_HOST_QMP);
}
void qmp_stop(Error **errp)
......@@ -105,7 +105,7 @@ void qmp_stop(Error **errp)
void qmp_system_reset(Error **errp)
{
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_HOST_QMP);
}
void qmp_system_powerdown(Error **erp)
......
......@@ -51,8 +51,8 @@ bool replay_next_event_is(int event)
switch (replay_state.data_kind) {
case EVENT_SHUTDOWN ... EVENT_SHUTDOWN_LAST:
replay_finish_event();
/* TODO - pass replay_state.data_kind - EVENT_SHUTDOWN as cause */
qemu_system_shutdown_request();
qemu_system_shutdown_request(replay_state.data_kind -
EVENT_SHUTDOWN);
break;
default:
/* clock, time_t, checkpoint and other events */
......
......@@ -60,9 +60,9 @@ void helper_tb_flush(CPUAlphaState *env)
void helper_halt(uint64_t restart)
{
if (restart) {
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
} else {
qemu_system_shutdown_request();
qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
}
}
......
......@@ -137,7 +137,7 @@ void arm_handle_psci_call(ARMCPU *cpu)
}
break;
case QEMU_PSCI_0_2_FN_SYSTEM_RESET:
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
/* QEMU reset and shutdown are async requests, but PSCI
* mandates that we never return from the reset/shutdown
* call, so power the CPU off now so it doesn't execute
......@@ -145,7 +145,7 @@ void arm_handle_psci_call(ARMCPU *cpu)
*/
goto cpu_off;
case QEMU_PSCI_0_2_FN_SYSTEM_OFF:
qemu_system_shutdown_request();
qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
goto cpu_off;
case QEMU_PSCI_0_1_FN_CPU_ON:
case QEMU_PSCI_0_2_FN_CPU_ON:
......
......@@ -59,7 +59,7 @@ static int check_exception(CPUX86State *env, int intno, int *error_code,
qemu_log_mask(CPU_LOG_RESET, "Triple fault\n");
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
return EXCP_HLT;
}
#endif
......
......@@ -540,14 +540,14 @@ static int hax_vcpu_hax_exec(CPUArchState *env)
/* Guest state changed, currently only for shutdown */
case HAX_EXIT_STATECHANGE:
fprintf(stdout, "VCPU shutdown request\n");
qemu_system_shutdown_request();
qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
hax_vcpu_sync_state(env, 0);
ret = 1;
break;
case HAX_EXIT_UNKNOWN_VMEXIT:
fprintf(stderr, "Unknown VMX exit %x from guest\n",
ht->_exit_reason);
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
hax_vcpu_sync_state(env, 0);
cpu_dump_state(cpu, stderr, fprintf, 0);
ret = -1;
......@@ -578,7 +578,7 @@ static int hax_vcpu_hax_exec(CPUArchState *env)
break;
default:
fprintf(stderr, "Unknown exit %x from HAX\n", ht->_exit_status);
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
hax_vcpu_sync_state(env, 0);
cpu_dump_state(cpu, stderr, fprintf, 0);
ret = 1;
......
......@@ -1212,7 +1212,7 @@ static void do_inject_x86_mce(CPUState *cs, run_on_cpu_data data)
" triple fault\n",
cs->cpu_index);
qemu_log_mask(CPU_LOG_RESET, "Triple fault\n");
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
return;
}
if (banks[1] & MCI_STATUS_VAL) {
......
......@@ -2930,7 +2930,7 @@ int kvm_arch_process_async_events(CPUState *cs)
if (env->exception_injected == EXCP08_DBLE) {
/* this means triple fault */
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
cs->exit_request = 1;
return 0;
}
......
......@@ -266,7 +266,7 @@ void load_psw(CPUS390XState *env, uint64_t mask, uint64_t addr)
S390CPU *cpu = s390_env_get_cpu(env);
if (s390_cpu_halt(cpu) == 0) {
#ifndef CONFIG_USER_ONLY
qemu_system_shutdown_request();
qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
#endif
}
}
......
......@@ -1927,7 +1927,7 @@ static int handle_intercept(S390CPU *cpu)
cpu_synchronize_state(cs);
if (s390_cpu_halt(cpu) == 0) {
if (is_special_wait_psw(cs)) {
qemu_system_shutdown_request();
qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
} else {
qemu_system_guest_panicked(NULL);
}
......@@ -1936,7 +1936,7 @@ static int handle_intercept(S390CPU *cpu)
break;
case ICPT_CPU_STOP:
if (s390_cpu_set_state(CPU_STATE_STOPPED, cpu) == 0) {
qemu_system_shutdown_request();
qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
}
if (cpu->env.sigp_order == SIGP_STOP_STORE_STATUS) {
kvm_s390_store_status(cpu, KVM_S390_STORE_STATUS_DEF_ADDR,
......
......@@ -532,11 +532,11 @@ uint32_t HELPER(sigp)(CPUS390XState *env, uint64_t order_code, uint32_t r1,
break;
#if !defined(CONFIG_USER_ONLY)
case SIGP_RESTART:
qemu_system_reset_request();
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
cpu_loop_exit(CPU(s390_env_get_cpu(env)));
break;
case SIGP_STOP:
qemu_system_shutdown_request();
qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
cpu_loop_exit(CPU(s390_env_get_cpu(env)));
break;
#endif
......
......@@ -109,7 +109,7 @@ void sparc_cpu_do_interrupt(CPUState *cs)
if (env->psret == 0) {
if (cs->exception_index == 0x80 &&
env->def->features & CPU_FEATURE_TA0_SHUTDOWN) {
qemu_system_shutdown_request();
qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
} else {