Commit 54ab9927 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Peter Maydell

hw/timer/exynos4210_mct: Cleanup indentation and empty new lines

Statements under 'case' were in some places wrongly indented bringing
confusion and making the code less readable.  Remove also few unneeded
blank lines.  No functional changes.
Signed-off-by: 's avatarKrzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: 's avatarPeter Maydell <peter.maydell@linaro.org>
Reviewed-by: 's avatarPhilippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: 's avatarPeter Maydell <peter.maydell@linaro.org>
parent 92e5d7e2
......@@ -1016,9 +1016,9 @@ static uint64_t exynos4210_mct_read(void *opaque, hwaddr offset,
case G_COMP_L(0): case G_COMP_L(1): case G_COMP_L(2): case G_COMP_L(3):
case G_COMP_U(0): case G_COMP_U(1): case G_COMP_U(2): case G_COMP_U(3):
index = GET_G_COMP_IDX(offset);
shift = 8 * (offset & 0x4);
value = UINT32_MAX & (s->g_timer.reg.comp[index] >> shift);
index = GET_G_COMP_IDX(offset);
shift = 8 * (offset & 0x4);
value = UINT32_MAX & (s->g_timer.reg.comp[index] >> shift);
break;
case G_TCON:
......@@ -1067,7 +1067,6 @@ static uint64_t exynos4210_mct_read(void *opaque, hwaddr offset,
lt_i = GET_L_TIMER_IDX(offset);
value = exynos4210_lfrc_get_count(&s->l_timer[lt_i]);
break;
case L0_TCON: case L1_TCON:
......@@ -1153,23 +1152,23 @@ static void exynos4210_mct_write(void *opaque, hwaddr offset,
case G_COMP_L(0): case G_COMP_L(1): case G_COMP_L(2): case G_COMP_L(3):
case G_COMP_U(0): case G_COMP_U(1): case G_COMP_U(2): case G_COMP_U(3):
index = GET_G_COMP_IDX(offset);
shift = 8 * (offset & 0x4);
s->g_timer.reg.comp[index] =
(s->g_timer.reg.comp[index] &
(((uint64_t)UINT32_MAX << 32) >> shift)) +
(value << shift);
index = GET_G_COMP_IDX(offset);
shift = 8 * (offset & 0x4);
s->g_timer.reg.comp[index] =
(s->g_timer.reg.comp[index] &
(((uint64_t)UINT32_MAX << 32) >> shift)) +
(value << shift);
DPRINTF("comparator %d write 0x%llx val << %d\n", index, value, shift);
DPRINTF("comparator %d write 0x%llx val << %d\n", index, value, shift);
if (offset & 0x4) {
s->g_timer.reg.wstat |= G_WSTAT_COMP_U(index);
} else {
s->g_timer.reg.wstat |= G_WSTAT_COMP_L(index);
}
if (offset & 0x4) {
s->g_timer.reg.wstat |= G_WSTAT_COMP_U(index);
} else {
s->g_timer.reg.wstat |= G_WSTAT_COMP_L(index);
}
exynos4210_gfrc_restart(s);
break;
exynos4210_gfrc_restart(s);
break;
case G_TCON:
old_val = s->g_timer.reg.tcon;
......@@ -1207,7 +1206,6 @@ static void exynos4210_mct_write(void *opaque, hwaddr offset,
break;
case G_INT_ENB:
/* Raise IRQ if transition from disabled to enabled and CSTAT pending */
for (i = 0; i < MCT_GT_CMP_NUM; i++) {
if ((value & G_INT_ENABLE(i)) > (s->g_timer.reg.tcon &
......@@ -1288,7 +1286,6 @@ static void exynos4210_mct_write(void *opaque, hwaddr offset,
break;
case L0_TCNTB: case L1_TCNTB:
lt_i = GET_L_TIMER_IDX(offset);
index = GET_L_TIMER_CNT_REG_IDX(offset, lt_i);
......@@ -1316,7 +1313,6 @@ static void exynos4210_mct_write(void *opaque, hwaddr offset,
break;
case L0_ICNTB: case L1_ICNTB:
lt_i = GET_L_TIMER_IDX(offset);
index = GET_L_TIMER_CNT_REG_IDX(offset, lt_i);
......@@ -1353,13 +1349,12 @@ static void exynos4210_mct_write(void *opaque, hwaddr offset,
if (icntb_max[lt_i] < value) {
icntb_max[lt_i] = value;
}
DPRINTF("local timer[%d] ICNTB write %llx; max=%x, min=%x\n\n",
lt_i, value, icntb_max[lt_i], icntb_min[lt_i]);
DPRINTF("local timer[%d] ICNTB write %llx; max=%x, min=%x\n\n",
lt_i, value, icntb_max[lt_i], icntb_min[lt_i]);
#endif
break;
break;
case L0_FRCNTB: case L1_FRCNTB:
lt_i = GET_L_TIMER_IDX(offset);
index = GET_L_TIMER_CNT_REG_IDX(offset, lt_i);
......
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