Commit 4065ae76 authored by Aurelien Jarno's avatar Aurelien Jarno Committed by Richard Henderson

target/s390x: implement TRANSLATE ONE/TWO TO ONE/TWO

Signed-off-by: 's avatarAurelien Jarno <aurelien@aurel32.net>
Message-Id: <20170531220129.27724-29-aurelien@aurel32.net>
Signed-off-by: 's avatarRichard Henderson <rth@twiddle.net>
parent 5d4a655a
......@@ -95,6 +95,7 @@ DEF_HELPER_FLAGS_3(tp, TCG_CALL_NO_WG, i32, env, i64, i32)
DEF_HELPER_FLAGS_4(tr, TCG_CALL_NO_WG, void, env, i32, i64, i64)
DEF_HELPER_4(tre, i64, env, i64, i64, i64)
DEF_HELPER_4(trt, i32, env, i32, i64, i64)
DEF_HELPER_5(trXX, i32, env, i32, i32, i32, i32)
DEF_HELPER_4(cksm, i64, env, i64, i64, i64)
DEF_HELPER_FLAGS_5(calc_cc, TCG_CALL_NO_RWG_SE, i32, env, i32, i64, i64, i64)
DEF_HELPER_FLAGS_2(sfpc, TCG_CALL_NO_RWG, void, env, i64)
......
......@@ -870,6 +870,15 @@
/* TRANSLATE EXTENDED */
C(0xb2a5, TRE, RRE, Z, 0, r2, r1_P, 0, tre, 0)
/* TRANSLATE ONE TO ONE */
C(0xb993, TROO, RRF_c, E2, 0, 0, 0, 0, trXX, 0)
/* TRANSLATE ONE TO TWO */
C(0xb992, TROT, RRF_c, E2, 0, 0, 0, 0, trXX, 0)
/* TRANSLATE TWO TO ONE */
C(0xb991, TRTO, RRF_c, E2, 0, 0, 0, 0, trXX, 0)
/* TRANSLATE TWO TO TWO */
C(0xb990, TRTT, RRF_c, E2, 0, 0, 0, 0, trXX, 0)
/* UNPACK */
/* Really format SS_b, but we pack both lengths into one argument
for the helper call, so we might as well leave one 8-bit field. */
......
......@@ -1196,6 +1196,51 @@ uint32_t HELPER(trt)(CPUS390XState *env, uint32_t len, uint64_t array,
return do_helper_trt(env, len, array, trans, GETPC());
}
/* Translate one/two to one/two */
uint32_t HELPER(trXX)(CPUS390XState *env, uint32_t r1, uint32_t r2,
uint32_t tst, uint32_t sizes)
{
uintptr_t ra = GETPC();
int dsize = (sizes & 1) ? 1 : 2;
int ssize = (sizes & 2) ? 1 : 2;
uint64_t tbl = get_address(env, 1) & ~7;
uint64_t dst = get_address(env, r1);
uint64_t len = get_length(env, r1 + 1);
uint64_t src = get_address(env, r2);
uint32_t cc = 3;
int i;
check_alignment(env, len, ssize, ra);
/* Lest we fail to service interrupts in a timely manner, */
/* limit the amount of work we're willing to do. */
for (i = 0; i < 0x2000; i++) {
uint16_t sval = cpu_ldusize_data_ra(env, src, ssize, ra);
uint64_t tble = tbl + (sval * dsize);
uint16_t dval = cpu_ldusize_data_ra(env, tble, dsize, ra);
if (dval == tst) {
cc = 1;
break;
}
cpu_stsize_data_ra(env, dst, dval, dsize, ra);
len -= ssize;
src += ssize;
dst += dsize;
if (len == 0) {
cc = 0;
break;
}
}
set_address(env, r1, dst);
set_length(env, r1 + 1, len);
set_address(env, r2, src);
return cc;
}
void HELPER(cdsg)(CPUS390XState *env, uint64_t addr,
uint32_t r1, uint32_t r3)
{
......
......@@ -4340,6 +4340,36 @@ static ExitStatus op_trt(DisasContext *s, DisasOps *o)
return NO_EXIT;
}
static ExitStatus op_trXX(DisasContext *s, DisasOps *o)
{
TCGv_i32 r1 = tcg_const_i32(get_field(s->fields, r1));
TCGv_i32 r2 = tcg_const_i32(get_field(s->fields, r2));
TCGv_i32 sizes = tcg_const_i32(s->insn->opc & 3);
TCGv_i32 tst = tcg_temp_new_i32();
int m3 = get_field(s->fields, m3);
/* XXX: the C bit in M3 should be considered as 0 when the
ETF2-enhancement facility is not installed. */
if (m3 & 1) {
tcg_gen_movi_i32(tst, -1);
} else {
tcg_gen_extrl_i64_i32(tst, regs[0]);
if (s->insn->opc & 3) {
tcg_gen_ext8u_i32(tst, tst);
} else {
tcg_gen_ext16u_i32(tst, tst);
}
}
gen_helper_trXX(cc_op, cpu_env, r1, r2, tst, sizes);
tcg_temp_free_i32(r1);
tcg_temp_free_i32(r2);
tcg_temp_free_i32(sizes);
tcg_temp_free_i32(tst);
set_cc_static(s);
return NO_EXIT;
}
static ExitStatus op_ts(DisasContext *s, DisasOps *o)
{
TCGv_i32 t1 = tcg_const_i32(0xff);
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment