• Michael Davidsaver's avatar
    arm: add MPU support to M profile CPUs · 29c483a5
    Michael Davidsaver authored
    The M series MPU is almost the same as the already implemented R
    profile MPU (v7 PMSA).  So all we need to implement here is the MPU
    register interface in the system register space.
    
    This implementation has the same restriction as the R profile MPU
    that it doesn't permit regions to be sized down smaller than 1K.
    
    We also do not yet implement support for MPU_CTRL.HFNMIENA; this
    bit should if zero disable use of the MPU when running HardFault,
    NMI or with FAULTMASK set to 1 (ie at an execution priority of
    less than zero) -- if the MPU is enabled we don't treat these
    cases any differently.
    Signed-off-by: 's avatarMichael Davidsaver <mdavidsaver@gmail.com>
    Message-id: 1493122030-32191-13-git-send-email-peter.maydell@linaro.org
    [PMM: Keep all the bits in mpu_ctrl field, rather than
     using SCTLR bits for them; drop broken HFNMIENA support;
     various cleanup]
    Signed-off-by: 's avatarPeter Maydell <peter.maydell@linaro.org>
    29c483a5
machine.c 10.9 KB